309 search results - page 49 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
General purpose programming on the graphics processing units (GPGPU) has received a lot of attention in the parallel computing community as it promises to offer the highest perfo...
ICS
2010
Tsinghua U.
14 years 9 days ago
2010
Tsinghua U.
We explore the intersection between an emerging class of architectures and a prominent workload: GPGPUs (General-Purpose Graphics Processing Units) and regular expression matching...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...