309 search results - page 4 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Abstract--As multicore processors are deployed in mainstream computing, the need for software tools to help parallelize programs is increasing dramatically. Data-dependence profili...
HICSS
1995
IEEE
13 years 11 months ago
1995
IEEE
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
ICPP
2009
IEEE
13 years 5 months ago
2009
IEEE
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
NPC
2005
Springer
14 years 29 days ago
2005
Springer
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...