Sciweavers

309 search results - page 56 / 62
» Parallel Memory Architecture for Arbitrary Stride Accesses
Sort
View
SPAA
2004
ACM
14 years 28 days ago
DCAS is not a silver bullet for nonblocking algorithm design
Despite years of research, the design of efficient nonblocking algorithms remains difficult. A key reason is that current shared-memory multiprocessor architectures support only s...
Simon Doherty, David Detlefs, Lindsay Groves, Chri...
IPPS
2000
IEEE
13 years 12 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
AINA
2010
IEEE
13 years 7 months ago
Schedule Distributed Virtual Machines in a Service Oriented Environment
—Virtual machines offer unique advantages to the scientific computing community, such as Quality of Service(QoS) guarantee, performance isolation, easy resource management, and ...
Lizhe Wang, Gregor von Laszewski, Marcel Kunze, Ji...
IPPS
2010
IEEE
13 years 5 months ago
Servet: A benchmark suite for autotuning on multicore clusters
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
Jorge González-Domínguez, Guillermo ...
ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
14 years 1 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...