309 search results - page 7 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
HPDC
2006
IEEE
14 years 1 months ago
2006
IEEE
The aIOLi project aims at optimizing the I/O accesses within the cluster by providing a simple POSIX API, thus avoiding the constraints to use a dedicated parallel I/O library. Th...
ARCS
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. A major problem considering parallel computing is maintaining memory consistency and coherency, and ensuring ownership and access rights. These problems mainly arise from...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
HPCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...