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VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
JSA
2000
100views more  JSA 2000»
13 years 7 months ago
Stripped mirroring RAID architecture
Redundant arrays of independent disks (RAID) provide an ecient stable storage system for parallel access and fault tolerance. The most common fault tolerant RAID architecture is R...
Hai Jin, Kai Hwang
CAGD
1998
99views more  CAGD 1998»
13 years 7 months ago
A Laguerre geometric approach to rational offsets
Laguerre geometry provides a simple approach to the design of rational curves and surfaces with rational offsets. These so-called PH curves and PN surfaces can be constructed from...
Martin Peternell, Helmut Pottmann
IJCIS
1998
116views more  IJCIS 1998»
13 years 7 months ago
Distributed Query Scheduling Service: An Architecture and Its Implementation
We present the systematic design and development of a distributed query scheduling service DQS in the context of DIOM, a distributed and interoperable query mediation system 26 ...
Ling Liu, Calton Pu, Kirill Richine
TVCG
1998
197views more  TVCG 1998»
13 years 7 months ago
A New Line Integral Convolution Algorithm for Visualizing Time-Varying Flow Fields
—New challenges on vector field visualization emerge as time-dependent numerical simulations become ubiquitous in the field of computational fluid dynamics (CFD). To visualize da...
Han-Wei Shen, David L. Kao