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SAC
2002
ACM
13 years 7 months ago
Automatic code generation for executing tiled nested loops onto parallel architectures
This paper presents a novel approach for the problem of generating tiled code for nested for-loops using a tiling transformation. Tiling or supernode transformation has been widel...
Georgios I. Goumas, Maria Athanasaki, Nectarios Ko...
DSD
2006
IEEE
131views Hardware» more  DSD 2006»
13 years 11 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
IEEECIT
2010
IEEE
13 years 6 months ago
Collective Communication in Recursive Dual-Net: An Interconnection Network for High-Performance Parallel Computer Systems of the
Abstract—In this paper, we propose efficient routing algorithms for collective communication in a newly proposed, versatile network, called a recursive dual-net (RDN). The RDN c...
Yamin Li, Shietung Peng, Wanming Chu
ICST
2009
IEEE
14 years 2 months ago
PKorat: Parallel Generation of Structurally Complex Test Inputs
Constraint solving lies at the heart of several specification-based approaches to automated testing. Korat is a previously developed algorithm for solving constraints in Java pro...
Junaid Haroon Siddiqui, Sarfraz Khurshid
ESOP
2012
Springer
12 years 3 months ago
Generate, Test, and Aggregate - A Calculation-based Framework for Systematic Parallel Programming with MapReduce
Abstract. MapReduce, being inspired by the map and reduce primitives available in many functional languages, is the de facto standard for large scale data-intensive parallel progra...
Kento Emoto, Sebastian Fischer, Zhenjiang Hu