127 search results - page 15 / 26 » Parallel Performance Prediction for Multigrid Codes on Distr... |
139
Voted
IPPS
1998
IEEE
15 years 6 months ago
1998
IEEE
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
130
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SPAA
2010
ACM
15 years 7 months ago
2010
ACM
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
166
Voted
IPPS
2007
IEEE
15 years 9 months ago
2007
IEEE
Search-based graph queries, such as finding short paths and isomorphic subgraphs, are dominated by memory latency. If input graphs can be partitioned appropriately, large cluster...
115
Voted
IPPS
2003
IEEE
15 years 8 months ago
2003
IEEE
Widespread adaptation of shared memory programming for High Performance Computing has been inhibited by a lack of standardization and the resulting portability problems between pl...
122
Voted
IEEEPACT
2007
IEEE
15 years 9 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...