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» Parallel Processing Architectures for Reconfigurable Systems
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IPPS
2003
IEEE
14 years 2 months ago
The CoGenT Project: Co-Generating Compilers and Simulators for Dynamically Compiled Languages
To understand the performance of modern Java systems one must observe execution in the context of specific architectures. It is also important that we make these observations usi...
J. Eliot B. Moss, Charles C. Weems, Timothy Richar...
ICPP
2009
IEEE
14 years 3 months ago
Accelerating Checkpoint Operation by Node-Level Write Aggregation on Multicore Systems
—Clusters and applications continue to grow in size while their mean time between failure (MTBF) is getting smaller. Checkpoint/Restart is becoming increasingly important for lar...
Xiangyong Ouyang, Karthik Gopalakrishnan, Dhabales...
IFIP12
2007
13 years 10 months ago
Hardware Natural Language Interface
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
Christos Pavlatos, Alexandros C. Dimopoulos, Georg...
ICPP
2008
IEEE
14 years 3 months ago
Machine Learning Models to Predict Performance of Computer System Design Alternatives
Computer manufacturers spend a huge amount of time, resources, and money in designing new systems and newer configurations, and their ability to reduce costs, charge competitive p...
Berkin Özisikyilmaz, Gokhan Memik, Alok N. Ch...
GPC
2008
Springer
13 years 10 months ago
An Automatic and Scalable Testing Tool for Workflow Systems
Nowadays workflow systems are widely deployed around the world, especially within large international corporations. Thus the performance evaluation of these workflow systems becom...
Lin Quan, Xiaozhu Lin, Jianmin Wang