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» Parallel Processing Architectures for Reconfigurable Systems
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IPPS
1999
IEEE
13 years 12 months ago
An Efficient Implementation Method of Fractal Image Compression on Dynamically Reconfigurable Architecture
Abstract. This paper proposes a method for implementing fractal image compression on dynamically reconfigurable architecture. In the encoding of this compression, metric computatio...
Hidehisa Nagano, Akihiro Matsuura, Akira Nagoya
IPPS
2007
IEEE
14 years 1 months ago
A Cost-Effective, High Bandwidth Server I/O network Architecture for Cluster Systems
In this paper we present a cost-effective, high bandwidth server I/O network architecture, named PaScal (Parallel and Scalable). We use the PaScal server I/O network to support da...
Hsing-bung Chen, Gary Grider, Parks Fields
ESIAT
2009
IEEE
13 years 5 months ago
Study on Architecture of Photogrammetric Parallel Processing System Based on Cluster Computing
Comparing with the rapidly increasing acquiring technology for remotely sensed data, the data processing technologies have been following behind, especially in computing speed and ...
Liu Hangye, Sui Xuelian, Zong Jingchun
ISPAN
1997
IEEE
13 years 12 months ago
RMESH Algorithms for Parallel String Matching
Abstract- String matching problem received much attention over the years due to its importance in various applications such as text/file comparison, DNA sequencing, search engines,...
Hsi-Chieh Lee, Fikret Erçal
RECONFIG
2008
IEEE
140views VLSI» more  RECONFIG 2008»
14 years 2 months ago
Generalised Parallel Bilinear Interpolation Architecture for Vision Systems
Bilinear interpolation is widely used in computer vision for extracting pixel values for positions that lie off the pixel grid in an image. For each sub-pixel, the values of four ...
Suhaib A. Fahmy