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» Parallel Processing Architectures for Reconfigurable Systems
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PDPTA
2000
13 years 9 months ago
Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures
The paper focuses on coarse-grained dynamically reconfigurable array architectures promising performance and flexibility for different challenging application areas, e. g. future ...
Jürgen Becker, Manfred Glesner, Ahmad Alsolai...
EDO
2006
Springer
13 years 11 months ago
REDS: a reconfigurable dispatching system
We present a new publish-subscribe middleware called REDS (REconfigurable Dispatching System) designed to tolerate dynamic reconfigurations of the dispatching infrastructure, like...
Gianpaolo Cugola, Gian Pietro Picco
DAC
2001
ACM
14 years 8 months ago
A Quick Safari Through the Reconfiguration Jungle
Cost effective systems use specialization to optimize factors such as power consumption, processing throughput, flexibility or combinations thereof. Reconfigurable systems obtain ...
Patrick Schaumont, Ingrid Verbauwhede, Kurt Keutze...
MAM
2007
113views more  MAM 2007»
13 years 7 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
EH
1999
IEEE
122views Hardware» more  EH 1999»
13 years 12 months ago
The MorphoSys Dynamically Reconfigurable System-on-Chip
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Ba...