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» Parallel Processing Architectures for Reconfigurable Systems
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FDL
2005
IEEE
14 years 1 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
Antoni Portero, Lluis Ribas, Jordi Carrabina
ICASSP
2009
IEEE
14 years 2 months ago
Bandwidth adaptive hardware architecture of K-Means clustering for intelligent video processing
K-Means is a clustering algorithm that is widely applied in many elds, including pattern classi cation and multimedia analysis. Due to real-time requirements and computational-cos...
Tse-Wei Chen, Shao-Yi Chien
FLAIRS
2001
13 years 9 months ago
A Background Layer of Health Monitoring and Error Handling for ObjectAgent
ObjectAgent is an agent-based, message-passing software architecture that utilizes natural language processing to provide autonomous control to complex systems. As a form of distr...
Joseph B. Mueller, Derek M. Surka, Joy J. Lin
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 1 months ago
High-speed VLSI architecture for parallel Reed-Solomon decoder
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
Hanho Lee
HPCA
2000
IEEE
14 years 4 days ago
PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620
The paper presents PowerMANNA - a distributed-memory parallel computer system based on the 64-Bit PowerPC processor MPC620. The PowerMANNA node architecture supports all the sophi...
Peter M. Behr, S. Pletner, Angela C. Sodan