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» Parallel Processing Architectures for Reconfigurable Systems
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DAC
2008
ACM
14 years 10 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
FTDCS
1997
IEEE
14 years 1 months ago
Distributed Transaction Processing as a Reliability Concept for Mobile Agents
Mobile agents offer a new possibility for the development of applications in distributed systems and are no longer a theoretical issue since different architectures for their impl...
Hartmut Vogler, Thomas Kunkelmann, Marie-Luise Mos...
PDPTA
1996
13 years 10 months ago
Document Retrieval Performance on Parallel Systems
The problem of eciently retrieving and ranking documents from a huge collection according to their relevance to a research topic is addressed. A broad class of queries is de ned a...
David Hawking
CLUSTER
2008
IEEE
14 years 3 months ago
Gather-arrange-scatter: Node-level request reordering for parallel file systems on multi-core clusters
—Multiple processors or multi-core CPUs are now in common, and the number of processes running concurrently is increasing in a cluster. Each process issues contiguous I/O request...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
IEEECIT
2010
IEEE
13 years 7 months ago
SAT: A Stream Architecture Template for Embedded Applications
- The increase of embedded applications complexity has demanded hardware more flexible while providing higher performance. Reconfigurable architectures and stream processing have b...
Qianming Yang, Nan Wu, Mei Wen, Yi He, Huayou Su, ...