Sciweavers

833 search results - page 79 / 167
» Parallel Processing Architectures for Reconfigurable Systems
Sort
View
ISCI
1998
193views more  ISCI 1998»
13 years 8 months ago
A Parallel Implementation of Genetic Programming that Achieves Super-Linear Performance
: This paper describes the successful parallel implementation of genetic programming on a network of processing nodes using the transputer architecture. With this approach, researc...
David Andre, John R. Koza
JSSPP
2007
Springer
14 years 3 months ago
New Challenges of Parallel Job Scheduling
Abstract. The workshop on job scheduling strategies for parallel processing (JSSPP) studies the myriad aspects of managing resources on parallel and distributed computers. These st...
Eitan Frachtenberg, Uwe Schwiegelshohn
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
14 years 3 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
VISUALIZATION
1998
IEEE
14 years 1 months ago
Efficient warping for architectural walkthroughs using layered depth images
This paper presents efficient image-based rendering techniques used in the context of an architectural walkthrough system. Portals (doors and windows) are rendered by warping laye...
Voicu Popescu, Anselmo Lastra, Daniel G. Aliaga, M...
COORDINATION
2008
Springer
13 years 11 months ago
Formalizing Higher-Order Mobile Embedded Business Processes with Binding Bigraphs
Abstract. We propose and formalize HomeBPEL, a higher-order WSBPEL-like business process execution language where processes are firstclass values that can be stored in variables, p...
Mikkel Bundgaard, Arne J. Glenstrup, Thomas T. Hil...