1075 search results - page 141 / 215 » Parallel Programming with Transactional Memory |
146
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EUROPAR
2010
Springer
15 years 2 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
116
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IPPS
2002
IEEE
15 years 7 months ago
2002
IEEE
This paper describes a generic mechanism to migrate threads in heterogeneous distributed environments. To maintain high portability and flexibility, thread migration is implement...
155
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ICDCS
1997
IEEE
15 years 6 months ago
1997
IEEE
This paper evaluates the use of per-node multi-threading to hide remote memory and synchronization latencies in a software DSM. As with hardware systems, multi-threading in softwa...
110
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HPCN
1997
Springer
15 years 6 months ago
1997
Springer
Abstract. In this paper the design and validation of a high performance simulation is discussed that is of critical value to the feasibility study of the GRAIL project, the aim of ...
109
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HCW
1999
IEEE
15 years 6 months ago
1999
IEEE
The MILAN project, a joint effort involving Arizona State University and New York University, has produced and validated fundamental techniques for the realization of efficient, r...