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» Parallel Programming with Transactional Memory
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IPPS
2006
IEEE
14 years 2 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
SIGMOD
2004
ACM
262views Database» more  SIGMOD 2004»
14 years 8 months ago
The Next Database Revolution
Database system architectures are undergoing revolutionary changes. Most importantly, algorithms and data are being unified by integrating programming languages with the database ...
Jim Gray
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
14 years 1 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
EUROPAR
2007
Springer
14 years 2 months ago
Esodyp+: Prefetching in the Jackal Software DSM
Abstract. Prefetching transfers a data item in advance from its storage location to its usage location so that communication is hidden and does not delay computation. We present a ...
Michael Klemm, Jean Christophe Beyler, Ronny T. La...
IEEEPACT
2006
IEEE
14 years 2 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...