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» Parallel Programming with Transactional Memory
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APCSAC
2007
IEEE
14 years 4 months ago
Implicit Transactional Memory in Kilo-Instruction Multiprocessors
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
Marco Galluzzi, Enrique Vallejo, Adrián Cri...
ARC
2010
Springer
186views Hardware» more  ARC 2010»
14 years 1 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
SIMPRA
2011
13 years 4 months ago
A real-time multigrid finite hexahedra method for elasticity simulation using CUDA
In this paper we present a GPU-based multigrid approach for simulating elastic deformable objects in real time. Our method is based on a finite element discretization of the defo...
Christian Dick, Joachim Georgii, Rüdiger West...
OSDI
2008
ACM
14 years 10 months ago
Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs
Deadlock is an increasingly pressing concern as the multicore revolution forces parallel programming upon the average programmer. Existing approaches to deadlock impose onerous bu...
Manjunath Kudlur, Scott A. Mahlke, Stéphane...
HPCA
2007
IEEE
14 years 10 months ago
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E...