1075 search results - page 34 / 215 » Parallel Programming with Transactional Memory |
157
Voted
APCSAC
2007
IEEE
15 years 8 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
104
Voted
ARC
2010
Springer
15 years 5 months ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
142
Voted
SIMPRA
2011
14 years 9 months ago
2011
In this paper we present a GPU-based multigrid approach for simulating elastic deformable objects in real time. Our method is based on a finite element discretization of the defo...
118
Voted
OSDI
2008
ACM
16 years 2 months ago
2008
ACM
Deadlock is an increasingly pressing concern as the multicore revolution forces parallel programming upon the average programmer. Existing approaches to deadlock impose onerous bu...
102
Voted
HPCA
2007
IEEE
16 years 2 months ago
2007
IEEE
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...