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» Parallel Skyline Computation on Multicore Architectures
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ICPP
2009
IEEE
14 years 2 months ago
Accelerating Checkpoint Operation by Node-Level Write Aggregation on Multicore Systems
—Clusters and applications continue to grow in size while their mean time between failure (MTBF) is getting smaller. Checkpoint/Restart is becoming increasingly important for lar...
Xiangyong Ouyang, Karthik Gopalakrishnan, Dhabales...
CLUSTER
2008
IEEE
14 years 2 months ago
A multicore-enabled multirail communication engine
—The current trend in clusters architecture leads toward a massive use of multicore chips. This hardware evolution raises bottleneck issues at the network interface level. The us...
Elisabeth Brunet, François Trahay, Alexandr...
CISIS
2008
IEEE
13 years 9 months ago
Multi-variant Program Execution: Using Multi-core Systems to Defuse Buffer-Overflow Vulnerabilities
While memory-safe and type-safe languages have been available for many years, the vast majority of software is still implemented in type-unsafe languages such as C/C++. Despite ma...
Babak Salamat, Andreas Gal, Todd Jackson, Karthike...
ISCA
2010
IEEE
240views Hardware» more  ISCA 2010»
14 years 26 days ago
Modeling critical sections in Amdahl's law and its implications for multicore design
This paper presents a fundamental law for parallel performance: it shows that parallel performance is not only limited by sequential code (as suggested by Amdahl’s law) but is a...
Stijn Eyerman, Lieven Eeckhout
IPPS
2008
IEEE
14 years 2 months ago
Modeling and analysis of power in multicore network processors
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
S. Huang, Y. Luo, W. Feng