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» Parallel Switching in Connection-Oriented Networks
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HPCA
1998
IEEE
13 years 11 months ago
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
Shubhendu S. Mukherjee, Mark D. Hill
PCRCW
1997
Springer
13 years 11 months ago
Power/Performance Trade-offs for Direct Networks
High performance portable and space-borne systems continue to demand increasing computation speeds while concurrently attempting to satisfy size, weight, and power constraints. As...
Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchil...
IPPS
2006
IEEE
14 years 1 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
ICDCS
1997
IEEE
13 years 11 months ago
Connection Admission Control for Hard Real-Time Communication in ATM Networks
Connection Admission Control (CAC) is needed in ATM networks to provide Quality of Service (QoS) guarantees to real-time connections. This paper presents a CAC scheme based on a b...
Qin Zheng, Tetsuya Yokotani, Tatsuki Ichihashi, Ya...
ISPASS
2006
IEEE
14 years 1 months ago
Modeling TCAM power for next generation network devices
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
Banit Agrawal, Timothy Sherwood