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CIS
2006
Springer
13 years 11 months ago
A New Parallel Multiplier for Type II Optimal Normal Basis
In hardware implementation for the finite field, the use of normal basis has several advantages, especially the optimal normal basis is the most efficient to hardware implementati...
Chang Han Kim, Yongtae Kim, Sung Yeon Ji, IlWhan P...
FCCM
2009
IEEE
190views VLSI» more  FCCM 2009»
14 years 2 months ago
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA)
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...
CCO
2001
Springer
161views Combinatorics» more  CCO 2001»
13 years 12 months ago
Branch, Cut, and Price: Sequential and Parallel
Branch, cut, and price (BCP) is an LP-based branch and bound technique for solving large-scale discrete optimization problems (DOPs). In BCP, both cuts and variables can be generat...
Laszlo Ladányi, Ted K. Ralphs, Leslie E. Tr...
PVG
2003
IEEE
138views Visualization» more  PVG 2003»
14 years 20 days ago
Sort-First, Distributed Memory Parallel Visualization and Rendering
While commodity computing and graphics hardware has increased in capacity and dropped in cost, it is still quite difficult to make effective use of such systems for general-purpos...
E. Wes Bethel, Greg Humphreys, Brian E. Paul, J. D...
ARC
2010
Springer
126views Hardware» more  ARC 2010»
13 years 5 months ago
Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip
The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communication networks are considered as one of the challe...
Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyse...