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EUROPAR
1999
Springer
14 years 7 days ago
Annotated Memory References: A Mechanism for Informed Cache Management
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
ISHPC
1999
Springer
14 years 6 days ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
HPCA
1998
IEEE
14 years 6 days ago
Address Translation Mechanisms In Network Interfaces
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
Ioannis Schoinas, Mark D. Hill
ICDCS
1998
IEEE
14 years 6 days ago
A Feedback Based Scheme for Improving TCP Performance in Ad-Hoc Wireless Networks
Ad-hoc networks consist of a set of mobile hosts that communicate using wireless links, without the use of other communication support facilities (such as base stations). The topo...
Kartik Chandran, Sudarshan Raghunathan, S. Venkate...
ICDCS
2010
IEEE
13 years 12 months ago
P2P Streaming Capacity under Node Degree Bound
—Two of the fundamental problems in peer-to-peer (P2P) streaming are as follows: what is the maximum streaming rate that can be sustained for all receivers, and what peering algo...
Shao Liu, Minghua Chen, Sudipta Sengupta, Mung Chi...