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EUROPAR
2006
Springer
13 years 11 months ago
PAM-SoC: A Toolchain for Predicting MPSoC Performance
In the past, research on Multiprocessor Systems-on-Chip (MPSoC) has focused mainly on increasing the available processing power on a chip, while less effort was put into specific s...
Ana Lucia Varbanescu, Henk J. Sips, Arjan J. C. va...
IPCCC
2006
IEEE
14 years 1 months ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John
TCSV
2010
13 years 2 months ago
High Performance Stereo Vision Designed for Massively Data Parallel Platforms
Abstract--Real-time stereo vision is attractive in many applications like robot navigation and 3D scene reconstruction. Data parallel platforms, e.g. GPU, is often used for real-ti...
Wei Yu, Tsuhan Chen, Franz Franchetti, James C. Ho...
SIGMETRICS
1996
ACM
118views Hardware» more  SIGMETRICS 1996»
13 years 11 months ago
Integrating Performance Monitoring and Communication in Parallel Computers
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
Margaret Martonosi, David Ofelt, Mark Heinrich
IPPS
2003
IEEE
14 years 24 days ago
A Performance Interface for Component-Based Applications
This work targets the emerging use of software component technology for high-performance scientific parallel and distributed computing. While component software engineering will ...
Sameer Shende, Allen D. Malony, Craig Edward Rasmu...