255 search results - page 46 / 51 » Parallel signal processing with S-Net |
CCECE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper applies a segmented matched filter for acquiring chip codephase alignment in direct-sequence CDMA packet communications. This alignment is essential for decoding the sp...
HICSS
2006
IEEE
14 years 1 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
GLVLSI
2003
IEEE
14 years 21 days ago
2003
IEEE
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
CONCUR
2003
Springer
14 years 19 days ago
2003
Springer
Abstract. Digital signal processing and control (DSPC) tools allow application developers to assemble systems by connecting predefined components in signal–flow graphs and by h...
NAACL
2003
13 years 8 months ago
2003
It is well known that frame independence assumption is a fundamental limitation of current HMM based speech recognition systems. By treating each speech frame independently, HMMs ...