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» Parallel simulation of chip-multiprocessor architectures
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HPDC
1999
IEEE
14 years 24 days ago
Resource Co-Allocation in Computational Grids
Applications designed to execute on "computational grids" frequently require the simultaneous co-allocation of multiple resources in order to meet performance requiremen...
Karl Czajkowski, Ian T. Foster, Carl Kesselman
TSE
1998
128views more  TSE 1998»
13 years 8 months ago
Modeling and Evaluating Design Alternatives for an On-Line Instrumentation System: A Case Study
—This paper demonstrates the use of a model-based evaluation approach for instrumentation systems (ISs). The overall objective of this study is to provide early feedback to tool ...
Abdul Waheed, Diane T. Rover, Jeffrey K. Hollingsw...
IPPS
2010
IEEE
13 years 6 months ago
On the parallelisation of MCMC by speculative chain execution
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
Jonathan M. R. Byrd, Stephen A. Jarvis, Abhir H. B...
HPCA
2007
IEEE
14 years 8 months ago
Illustrative Design Space Studies with Microarchitectural Regression Models
We apply a scalable approach for practical, comprehensive design space evaluation and optimization. This approach combines design space sampling and statistical inference to ident...
Benjamin C. Lee, David M. Brooks
FCCM
2009
IEEE
171views VLSI» more  FCCM 2009»
14 years 3 months ago
Accelerating SPICE Model-Evaluation using FPGAs
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
Nachiket Kapre, André DeHon