770 search results - page 121 / 154 » Parallel simulation of chip-multiprocessor architectures |
HIPC
2009
Springer
13 years 6 months ago
2009
Springer
In many-core architectures, memory blocks are commonly assigned to the banks of a NUCA cache by following a physical mapping. This mapping assigns blocks to cache banks in a round-...
KI
2001
Springer
14 years 28 days ago
2001
Springer
The paper presents a new technique for extracting symbolic ground facts out of the sensor data stream in autonomous robots for use under hybrid control architectures, which compris...
FCCM
2006
IEEE
14 years 2 months ago
2006
IEEE
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
ICS
2001
Tsinghua U.
14 years 28 days ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
SC
1992
ACM
14 years 16 days ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...