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» Parallel simulation of chip-multiprocessor architectures
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IPPS
2005
IEEE
14 years 2 months ago
Predicting Cache Space Contention in Utility Computing Servers
The need to provide performance guarantee in high performance servers has long been neglected. Providing performance guarantee in current and future servers is difficult because ï...
Yan Solihin, Fei Guo, Seongbeom Kim
PPOPP
2003
ACM
14 years 1 months ago
Improving server software support for simultaneous multithreaded processors
Simultaneous multithreading (SMT) represents a fundamental shift in processor capability. SMT's ability to execute multiple threads simultaneously within a single CPU offers ...
Luke McDowell, Susan J. Eggers, Steven D. Gribble
HPCA
2000
IEEE
14 years 25 days ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
ICPP
1997
IEEE
14 years 19 days ago
How Much Does Network Contention Affect Distributed Shared Memory Performance?
Most of recent research on distributed shared memory (DSM)systems have focused on either careful design of node controllersor cache coherenceprotocols. Whileevaluating these desig...
Donglai Dai, Dhabaleswar K. Panda
CF
2010
ACM
13 years 11 months ago
A communication infrastructure for a million processor machine
: The SpiNNaker machine is a massively parallel computing system, consisting of 1,000,000 cores. From one perspective, it has a place in Flynns' taxonomy: it is a straightforw...
Andrew D. Brown, Steve Furber, Jeff S. Reeve, Pete...