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» Parallel simulation of chip-multiprocessor architectures
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103
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ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
15 years 9 months ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman
116
Voted
MICRO
2000
IEEE
137views Hardware» more  MICRO 2000»
15 years 7 months ago
Relational profiling: enabling thread-level parallelism in virtual machines
Virtual machine service threads can perform many tasks in parallel with program execution such as garbage collection, dynamic compilation, and profile collection and analysis. Har...
Timothy H. Heil, James E. Smith
122
Voted
IPPS
2006
IEEE
15 years 9 months ago
Parallel implementation of the replica exchange molecular dynamics algorithm on Blue Gene/L
The Replica Exchange method is a popular approach for studying the folding thermodynamics of small to modest size proteins in explicit solvent, since it is easily parallelized. Ho...
Maria Eleftheriou, Aleksandr Rayshubskiy, Jed W. P...
91
Voted
IPPS
2006
IEEE
15 years 9 months ago
Sim-X: parallel system software for interactive multi-experiment computational studies
Advances in high-performance computing have led to the broad use of computational studies in everyday engineering and scientific applications. A single study may require thousand...
Siu-Man Yau, Eitan Grinspun, Vijay Karamcheti, Den...
SIPS
2007
IEEE
15 years 9 months ago
Sensitivity of Time-Division Multiplexing Parallel A/D Converters to Analog Imperfection
In this paper, the Time-Division Multiplexing (TDM) architecture for the Hybrid Filter Bank (HFB) A/D Converters (ADCs) is studied in the time domain. Giving a brief survey on the...
Davud Asemani, Jacques Oksman