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» Parallel simulation of chip-multiprocessor architectures
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134
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ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
15 years 8 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
105
Voted
IPPS
1999
IEEE
15 years 7 months ago
NWCache: Optimizing Disk Accesses via an Optical Network/Write Cache Hybrid
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
Enrique V. Carrera, Ricardo Bianchini
130
Voted
EAGC
2004
Springer
15 years 9 months ago
Managing MPI Applications in Grid Environments
One of the goals of the EU CrossGrid project is to provide a basis for supporting the efficient execution of parallel and interactive applications on Grid environments. CrossGrid j...
Elisa Heymann, Miquel A. Senar, Enol Fernán...
121
Voted
KES
2004
Springer
15 years 9 months ago
Vision Controlled Humanoid Robot Tool-Kit
This paper introduces a novel parallelised vision based intelligent controller for a Humanoid Robot system. This intelligent controller is simulated dynamically and its performance...
Chris H. Messom
126
Voted
HPCA
2004
IEEE
16 years 3 months ago
Stream Register Files with Indexed Access
Many current programmable architectures designed to exploit data parallelism require computation to be structured to operate on sequentially accessed vectors or streams of data. A...
Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William ...