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ISCA
2011
IEEE
290views Hardware» more  ISCA 2011»
13 years 2 months ago
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
Blas Cuesta, Alberto Ros, María Engracia G&...
OPODIS
2010
13 years 8 months ago
On Best-Effort Utility Accrual Real-Time Scheduling on Multiprocessors
We consider the problem of scheduling dependent real-time tasks for overloads on a multiprocessor system, yielding best-effort timing assurance. The application/scheduling model in...
Piyush Garyali, Matthew Dellinger, Binoy Ravindran
IEEEPACT
2008
IEEE
14 years 4 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...
HPCA
1997
IEEE
14 years 2 months ago
Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
Thomas Stricker, Thomas R. Gross
ICPPW
2005
IEEE
14 years 4 months ago
The Partitioned Scheduling of Sporadic Real-Time Tasks on Multiprocessor Platforms
Abstract— In the sporadic task model, a task is characterized by three parameters — an execution requirement, a relative deadline, and a period parameter — and has the interp...
Sanjoy K. Baruah, Nathan Fisher