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IEEEPACT
1997
IEEE
13 years 11 months ago
A Parallel Algorithm for Compile-Time Scheduling of Parallel Programs on Multiprocessors
† In this paper, we propose a parallel randomized algorithm, called Parallel Fast Assignment using Search Technique (PFAST), for scheduling parallel programs represented by direc...
Yu-Kwong Kwok, Ishfaq Ahmad
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
14 years 1 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
SPDP
1996
IEEE
13 years 11 months ago
Impact Of Load Balancing On Unstructured Adaptive Grid Computations For Distributed-Memory Multiprocessors
The computational requirements for an adaptive solution of unsteady problems change as the simulation progresses. This causes workload imbalance among processors on a parallel mac...
Andrew Sohn, Rupak Biswas, Horst D. Simon
IPPS
1996
IEEE
13 years 11 months ago
A Memory Controller for Improved Performance of Streamed Computations on Symmetric Multiprocessors
The growing disparity between processor and memory speeds has caused memory bandwidth to become the performance bottleneck for many applications. In particular, this performance g...
Sally A. McKee, William A. Wulf
IPPS
1998
IEEE
13 years 11 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...