1761 search results - page 62 / 353 » Parallel timing simulation on a distributed memory multiproc... |
EUROPAR
2010
Springer
13 years 10 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
EUROPAR
2010
Springer
13 years 10 months ago
2010
Springer
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
ISPDC
2005
IEEE
14 years 4 months ago
2005
IEEE
: Optimization is a healthy field targeted to find efficient solutions and algorithms to solve problems either in the academia and the industry. As the solved problems became harde...
IPPS
2000
IEEE
14 years 2 months ago
2000
IEEE
We consider networks of workstations which are not only timesharing, but also heterogeneous with a large variation in the computing power and memory capacities of different workst...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
Previous work on scheduling dynamic competitive jobs is focused on multiprocessors configurations. This paper presents a new distributed dynamic scheduling scheme for sporadic re...