1761 search results - page 72 / 353 » Parallel timing simulation on a distributed memory multiproc... |
ICDE
1999
IEEE
14 years 11 months ago
1999
IEEE
In this paper we present an online method for managing a goaloriented buffer partitioning in the distributed memory of a network of workstations. Our algorithm implements a feedba...
DATE
2005
IEEE
14 years 4 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
IPPS
2010
IEEE
13 years 8 months ago
2010
IEEE
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
PATMOS
2000
Springer
14 years 2 months ago
2000
Springer
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
WSC
2007
14 years 22 days ago
2007
Many of today’s military services and applications run on geographically distributed sites and need to be tested and evaluated under realistic scenarios with many unpredictable ...