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LCPC
2001
Springer
14 years 1 months ago
Bridging the Gap between Compilation and Synthesis in the DEFACTO System
Abstract. The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy - is a system that maps computations, expressed in high-level languages such as C, directly o...
Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoun...
IEEEPACT
2000
IEEE
14 years 1 months ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
DATE
2004
IEEE
210views Hardware» more  DATE 2004»
14 years 21 days ago
Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow
Emerging embedded system applications in multimedia and image processing are characterized by complex control flow consisting of deeply nested conditionals and loops. We present a...
Sumit Gupta, Nikil Dutt, Rajesh Gupta, Alexandru N...
AIPS
2009
13 years 10 months ago
Optimality Properties of Planning Via Petri Net Unfolding: A Formal Analysis
We provide a theoretical analysis of planning via Petri net unfolding, a novel technique for synthesising parallel plans. Parallel plans are generally valued for their execution f...
Sarah L. Hickmott, Sebastian Sardiña
CORR
2007
Springer
70views Education» more  CORR 2007»
13 years 9 months ago
Secure Broadcasting
Abstract—We study a problem of broadcasting confidential messages to multiple receivers under an information-theoretic secrecy constraint. Two scenarios are considered: 1) all r...
Ashish Khisti, Aslan Tchamkerten, Gregory W. Worne...