Sciweavers

1016 search results - page 168 / 204
» Parallelism Constraints
Sort
View
ICPP
2002
IEEE
14 years 1 months ago
Power Aware Scheduling for AND/OR Graphs in Multi-Processor Real-Time Systems
Power aware computing has become popular recently and many techniques have been proposed to manage the energy consumption for traditional real-time applications. We have previousl...
Dakai Zhu, Nevine AbouGhazaleh, Daniel Mossé...
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
14 years 1 months ago
Round-Robin Arbiter Design and Generation
In this paper, we introduce a Round–robin Arbiter Generator (RAG) tool. The RAG tool can generate a design for a Bus Arbiter (BA). The BA is able to handle the exact number of b...
Vincent John Mooney III, George F. Riley, Eung S. ...
ADAEUROPE
2010
Springer
14 years 1 months ago
What to Make of Multicore Processors for Reliable Real-Time Systems?
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...
Theodore P. Baker
DAC
2009
ACM
14 years 1 months ago
A computing origami: folding streams in FPGAs
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has a...
Andrei Hagiescu, Weng-Fai Wong, David F. Bacon, Ro...
EUROPAR
2001
Springer
14 years 1 months ago
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
Toshinori Sato, Itsujiro Arita