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» Parallelism through Digital Circuit Design
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FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
13 years 11 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
JCP
2007
153views more  JCP 2007»
13 years 7 months ago
An Integrated Educational Platform Implementing Real, Remote Lab-Experiments for Electrical Engineering Courses
—This paper describes an Internet-based laboratory, named Remote Monitored and Controlled Laboratory (RMCLab) developed at University of Patras, Greece, for electrical engineerin...
Dimitris Karadimas, Kostas Efstathiou
DAC
2008
ACM
14 years 8 months ago
The synthesis of robust polynomial arithmetic with stochastic logic
As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challeng...
Weikang Qian, Marc D. Riedel
CORR
2010
Springer
198views Education» more  CORR 2010»
13 years 7 months ago
Space and the Synchronic A-Ram
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
Alexander Victor Berka
CORR
2007
Springer
154views Education» more  CORR 2007»
13 years 7 months ago
Application of a design space exploration tool to enhance interleaver generation
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
Cyrille Chavet, Philippe Coussy, Pascal Urard, Eri...