26 search results - page 4 / 6 » Parallelization in Co-Compilation for Configurable Accelerat... |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
HPDC
2010
IEEE
13 years 7 months ago
2010
IEEE
Massively multicore processors, like, for example, Graphics Processing Units (GPUs), provide, at a comparable price, a one order of magnitude higher peak performance than traditio...
CCGRID
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract--Multi-core processors with accelerators are becoming commodity components for high-performance computing at scale. While accelerator-based processors have been studied in...
FPGA
2009
ACM
14 years 2 months ago
2009
ACM
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...