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FPL
2010
Springer
148views Hardware» more  FPL 2010»
13 years 5 months ago
FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators
FPGA devices are mostly utilized for customized application designs with heavily pipelined and aggressively parallel computations. However, little focus is normally given to the FP...
Muhammad Shafiq, Miquel Pericàs, Nacho Nava...
ASPLOS
2008
ACM
13 years 9 months ago
Parallelizing security checks on commodity hardware
Speck1 is a system that accelerates powerful security checks on commodity hardware by executing them in parallel on multiple cores. Speck provides an infrastructure that allows se...
Edmund B. Nightingale, Daniel Peek, Peter M. Chen,...
IPPS
2007
IEEE
14 years 1 months ago
Improving Scalability of OpenMP Applications on Multi-core Systems Using Large Page Support
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
Ranjit Noronha, Dhabaleswar K. Panda
ICPP
1995
IEEE
13 years 11 months ago
Fusion of Loops for Parallelism and Locality
Loop fusion improves data locality and reduces synchronization in data-parallel applications. However, loop fusion is not always legal. Even when legal, fusion may introduce loop-...
Naraig Manjikian, Tarek S. Abdelrahman
PPOPP
1997
ACM
13 years 11 months ago
Compiling Dynamic Mappings with Array Copies
Array remappings are useful to many applications on distributed memory parallel machines. They are available in High Performance Fortran, a Fortran-based data-parallel language. T...
Fabien Coelho