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» Parallelizing post-placement timing optimization
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ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
14 years 6 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
GECCO
2007
Springer
164views Optimization» more  GECCO 2007»
14 years 3 months ago
Is the island model fault tolerant?
In this paper, we present a study on the fault tolerance nature of the island model when applied to Genetic Algorithms. Parallel and distributed models have been extensively appli...
José Ignacio Hidalgo, Juan Lanchares, Franc...
LCPC
2007
Springer
14 years 3 months ago
Communicating Multiprocessor-Tasks
The use of multiprocessor tasks (M-tasks) has been shown to be successful for mixed task and data parallel implementations of algorithms from scientific computing. The approach o...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...
ICS
2005
Tsinghua U.
14 years 2 months ago
Improving the computational intensity of unstructured mesh applications
Although unstructured mesh algorithms are a popular means of solving problems across a broad range of disciplines—from texture mapping to computational fluid dynamics—they ar...
Brian S. White, Sally A. McKee, Bronis R. de Supin...
EUROPAR
2001
Springer
14 years 1 months ago
Load Redundancy Elimination on Executable Code
Optimizations performed at link time or directly applied to nal program executables have received increased attention in recent years. This paper discuss the discovery and elimina...
Manel Fernández, Roger Espasa, Saumya K. De...