5640 search results - page 916 / 1128 » Parallelizing the Data Cube |
EUROMICRO
1999
IEEE
14 years 2 months ago
1999
IEEE
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...
ICCD
1999
IEEE
14 years 2 months ago
1999
IEEE
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
ISCA
1999
IEEE
14 years 2 months ago
1999
IEEE
Value Prediction is a relatively new technique to increase instruction-level parallelism by breaking true data dependence chains. A value prediction architecture produces values, ...
MICRO
1999
IEEE
14 years 2 months ago
1999
IEEE
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
MICRO
1999
IEEE
14 years 2 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...