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HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
14 years 1 months ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
DSD
2004
IEEE
122views Hardware» more  DSD 2004»
14 years 26 days ago
On the Packet-Switched Implementation of a Discrete-Time CNN
Cellular Neural Networks are widely used with real-time image processing's applications. Such systems can be efficiently realized using macro enriched fieldprogrammable gate-...
Suleyman Malki, Lambert Spaanenburg
CONCUR
2010
Springer
13 years 9 months ago
Conditional Automata: A Tool for Safe Removal of Negligible Events
Abstract. Polynomially accurate simulations [19] are relations for Probabilistic Automata that require transitions to be matched up to negligible sets provided that computation len...
Roberto Segala, Andrea Turrini
ESANN
2008
13 years 10 months ago
Parallel asynchronous neighborhood mechanism for WTM Kohonen network implemented in CMOS technology
In this paper we present an original neighborhood mechanism for WTM self-organizing Kohonen map implemented in CMOS 0.18 m process. Proposed mechanism is an asynchronous circuit an...
Marta Kolasa, Rafal Dlugosz
CEC
2005
IEEE
14 years 2 months ago
Parallel evolutionary algorithms on graphics processing unit
Evolutionary Algorithms (EAs) are effective and robust methods for solving many practical problems such as feature selection, electrical circuits synthesis, and data mining. Howeve...
Man Leung Wong, Tien-Tsin Wong, Ka-Ling Fok