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ICCAD
2008
IEEE
141views Hardware» more  ICCAD 2008»
14 years 4 months ago
Layout decomposition for double patterning lithography
In double patterning lithography (DPL) layout decomposition for 45nm and below process nodes, two features must be assigned opposite colors (corresponding to different exposures)...
Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Ya...
GD
2005
Springer
14 years 26 days ago
Fast Node Overlap Removal
Most graph layout algorithms treat nodes as points. The problem of node overlap removal is to adjust the layout generated by such methods so that nodes of non-zero width and height...
Tim Dwyer, Kim Marriott, Peter J. Stuckey
SAS
2001
Springer
13 years 11 months ago
Using Slicing to Identify Duplication in Source Code
Programs often have a lot of duplicated code, which makes both understanding and maintenance more difficult. This problem can be alleviated by detecting duplicated code, extracting...
Raghavan Komondoor, Susan Horwitz
HICSS
2000
IEEE
136views Biometrics» more  HICSS 2000»
13 years 11 months ago
Ordered End-to-End Multicast for Distributed Multimedia Systems
We address the problem of message ordering for reliable multicast communication. End-to-end multicast ordering is useful for ensuring the collective integrity and consistency of d...
Hans-Peter Dommel, J. J. Garcia-Luna-Aceves
ITC
1993
IEEE
148views Hardware» more  ITC 1993»
13 years 11 months ago
DELTEST: Deterministic Test Generation for Gate-Delay Faults
This paper presents an efficient approach to generate tests for gate delay faults. Unlike other known algorithms which try to generate a 'good' delay test the presented ...
Udo Mahlstedt