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» Parametric Fault Simulation and Test Vector Generation
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ATS
2005
IEEE
100views Hardware» more  ATS 2005»
14 years 1 months ago
Finite State Machine Synthesis for At-Speed Oscillation Testability
In this paper, we propose an oscillation-based test methodology for sequential testing. This approach provides many advantages over traditional methods. (1) It is at-speed testing...
Katherine Shu-Min Li, Chung-Len Lee, Tagin Jiang, ...
DAC
2010
ACM
13 years 10 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 11 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
WSC
2007
13 years 9 months ago
A method for fast generation of bivariate Poisson random vectors
It is well known that trivariate reduction — a method to generate two dependent random variables from three independent random variables — can be used to generate Poisson rand...
Kaeyoung Shin, Raghu Pasupathy
IFIP
2001
Springer
13 years 11 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre