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» Partial Order Verification of Programmable Logic Controllers
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ASYNC
1999
IEEE
110views Hardware» more  ASYNC 1999»
14 years 1 days ago
Verification of Delayed-Reset Domino Circuits Using ATACS
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
CORR
2010
Springer
147views Education» more  CORR 2010»
13 years 4 months ago
RAFDA: A Policy-Aware Middleware Supporting the Flexible Separation of Application Logic from Distribution
Middleware technologies often limit the way in which object classes may be used in distributed applications due to the fixed distribution policies that they impose. These policies...
Scott M. Walker, Alan Dearle, Stuart J. Norcross, ...
FM
1999
Springer
121views Formal Methods» more  FM 1999»
13 years 12 months ago
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...
Hervé Marchand, Mazen Samaan
PEPM
2007
ACM
14 years 1 months ago
Poly-controlled partial evaluation in practice
Poly-Controlled Partial Evaluation (PCPE) is a powerful approach to partial evaluation, which has recently been proposed. PCPE takes into account sets of control strategies instea...
Claudio Ochoa, Germán Puebla
ECAI
2008
Springer
13 years 9 months ago
Temporal Logic Patterns for Querying Qualitative Models of Genetic Regulatory Networks
Formal verification based on model checking provides a powerful technology to query qualitative models of dynamical systems. The application of model-checking approaches is hamper...
Pedro T. Monteiro, Delphine Ropers, Radu Mateescu,...