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DATE
2010
IEEE
119views Hardware» more  DATE 2010»
14 years 3 months ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
ECCV
2004
Springer
15 years 2 days ago
Parallel Variational Motion Estimation by Domain Decomposition and Cluster Computing
We present an approach to parallel variational optical flow computation on standard hardware by domain decomposition. Using an arbitrary partition of the image plane into rectangul...
Timo Kohlberger, Christoph Schnörr, Andr&eacu...
CISIS
2008
IEEE
14 years 5 days ago
Simplified Bluetooth Scatternet Formation Using Maximal Independent Sets
Bluetooth standard allows the creation of piconets, with one node serving as its master and up to seven nodes serving as slaves. A Bluetooth ad hoc network can also be formed by in...
Nejib Zaguia, Ivan Stojmenovic, Yassine Daadaa
HPCC
2005
Springer
14 years 3 months ago
A Parallel Distance-2 Graph Coloring Algorithm for Distributed Memory Computers
Abstract. The distance-2 graph coloring problem aims at partitioning the vertex set of a graph into the fewest sets consisting of vertices pairwise at distance greater than two fro...
Doruk Bozdag, Ümit V. Çatalyürek,...
ICCTA
2007
IEEE
14 years 2 months ago
Faster Placer for Island-Style FPGAs
In this paper, we propose a placement method for islandstyle FPGAs, based on fast yet very good initial placement followed by refinement using ultra-low temperature Simulated Anne...
Pritha Banerjee, Susmita Sur-Kolay