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» Partitioning of VLSI Circuits and Systems
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FCCM
1997
IEEE
199views VLSI» more  FCCM 1997»
13 years 11 months ago
The RAW benchmark suite: computation structures for general purpose computing
The RAW benchmark suite consists of twelve programs designed to facilitate comparing, validating, and improving reconfigurable computing systems. These benchmarks run the gamut o...
Jonathan Babb, Matthew Frank, Victor Lee, Elliot W...
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Substrate resistance extraction with direct boundary element method
- It is important to model the substrate coupling for mixed-signal circuit designs today. This paper presents the direct boundary element method (BEM) for substrate resistance calc...
Xiren Wang, Wenjian Yu, Zeyi Wang
ICC
2007
IEEE
115views Communications» more  ICC 2007»
13 years 11 months ago
Super-Wideband SSN Suppression in High-Speed Digital Communication Systems by Using Multi-Via Electromagnetic Bandgap Structures
With the advance of semiconductor manufacturing, There are many approaches to deal with these problems. EDA, and VLSI design technologies, circuits with even higher Adding discrete...
MuShui Zhang, YuShan Li, LiPing Li, Chen Jia
FPL
1999
Springer
147views Hardware» more  FPL 1999»
13 years 11 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
TON
1998
80views more  TON 1998»
13 years 7 months ago
Blocking and nonblocking multirate Clos switching networks
— This paper investigates in detail the blocking and nonblocking behavior of multirate Clos switching networks at the connection/virtual connection level. The results are applica...
Soung C. Liew, Ming-Hung Ng, Cathy W. Chan