A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS...
Krishnan Ramakrishnan, S. Suresh, Narayanan Vijayk...
Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated Annealing (SA). The proposed architecture achieves ...