Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
On-board Fault Detection, Isolation and Recovery (FDIR) systems are considered to ensure the safety and to increase the autonomy of spacecrafts. They shall be carefully designed an...
Jean-Charles Chaudemar, Charles Castel, Christel S...
An important issue in the design of future Personal Communication Services (PCS) networks is the efficient management of location information. The current IS-41 standard P C S arc...
Govind Krishnamurthi, Stefano Chessa, Arun K. Soma...
Concurrency control mechanisms such as turn-taking, locking, serialization, transactional locking mechanism, and operational transformation try to provide data consistency when con...
Amir R. Razavi, Sotiris Moschoyiannis, Paul J. Kra...