Sciweavers

283 search results - page 18 / 57
» Pattern-Supported Architecture Recovery
Sort
View
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
13 years 12 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
ASPLOS
2004
ACM
14 years 1 months ago
Scalable selective re-execution for EDGE architectures
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
Rajagopalan Desikan, Simha Sethumadhavan, Doug Bur...
ASM
2008
ASM
13 years 9 months ago
FDIR Architectures for Autonomous Spacecraft: Specification and Assessment with Event-B
On-board Fault Detection, Isolation and Recovery (FDIR) systems are considered to ensure the safety and to increase the autonomy of spacecrafts. They shall be carefully designed an...
Jean-Charles Chaudemar, Charles Castel, Christel S...
ICCCN
1998
IEEE
13 years 12 months ago
Fast Recovery Protocol for Database and Link Failures in Mobile Networks
An important issue in the design of future Personal Communication Services (PCS) networks is the efficient management of location information. The current IS-41 standard P C S arc...
Govind Krishnamurthi, Stefano Chessa, Arun K. Soma...
WOTUG
2007
13 years 8 months ago
Concurrency Control and Recovery Management for Open e-Business Transactions
Concurrency control mechanisms such as turn-taking, locking, serialization, transactional locking mechanism, and operational transformation try to provide data consistency when con...
Amir R. Razavi, Sotiris Moschoyiannis, Paul J. Kra...