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BMVC
1998
13 years 9 months ago
Choosing an Optimal Neural Network Size to aid a Search Through a Large Image Database
In this paper a fast method of selecting a neural network architecture for pattern recognition tasks is presented. We demonstrate that our proposed method of selecting both input ...
Kieron Messer, Josef Kittler
DAC
1995
ACM
13 years 11 months ago
Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores
Application domain specific DSP cores are becoming increasingly popular due to their advantageous trade–off between flexibility and cost. However, existing code generation metho...
Adwin H. Timmer, Marino T. J. Strik, Jef L. van Me...
DDECS
2008
IEEE
227views Hardware» more  DDECS 2008»
13 years 10 months ago
Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
Milos Drutarovsky, Michal Varchola
ICDE
2007
IEEE
182views Database» more  ICDE 2007»
14 years 9 months ago
Discriminative Frequent Pattern Analysis for Effective Classification
The application of frequent patterns in classification appeared in sporadic studies and achieved initial success in the classification of relational data, text documents and graph...
Hong Cheng, Xifeng Yan, Jiawei Han, Chih-Wei Hsu
ICRA
2005
IEEE
155views Robotics» more  ICRA 2005»
14 years 1 months ago
CPG Design using Inhibitory Networks
– We describe in detail the behavior of an inhibitory Central Pattern Generator (CPG) network for robot control. A four-neuron, mutual inhibitory network forms the basic coordina...
M. Anthony Lewis, Francesco Tenore, Ralph Etienne-...