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» Patterns for Refinement Automation
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DAC
2003
ACM
14 years 8 months ago
Using a formal specification and a model checker to monitor and direct simulation
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
Serdar Tasiran, Yuan Yu, Brannon Batson
CADE
2009
Springer
14 years 8 months ago
Does This Set of Clauses Overlap with at Least One MUS?
This paper is concerned with the problem of checking whether a given subset of an unsatisfiable Boolean CNF formula takes part in the basic causes of the inconsistency of . More ...
Éric Grégoire, Bertrand Mazure, C&ea...
CADE
2008
Springer
14 years 8 months ago
Terminating Tableaux for Hybrid Logic with the Difference Modality and Converse
Abstract. We present the first terminating tableau calculus for basic hybrid logic with the difference modality and converse modalities. The language under consideration is basic m...
Mark Kaminski, Gert Smolka
CADE
2005
Springer
14 years 8 months ago
Deciding Monodic Fragments by Temporal Resolution
In this paper we study the decidability of various fragments of monodic first-order temporal logic by temporal resolution. We focus on two resolution calculi, namely, monodic tempo...
Ullrich Hustadt, Boris Konev, Renate A. Schmidt
CADE
2005
Springer
14 years 8 months ago
Tabling for Higher-Order Logic Programming
We describe the design and implementation of a higher-order tabled logic programming interpreter where some redundant and infinite computation is eliminated by memoizing sub-comput...
Brigitte Pientka