272 search results - page 47 / 55 » Patterns for programming in parallel, pedagogically |
ICS
1993
Tsinghua U.
14 years 15 days ago
1993
Tsinghua U.
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
ISHPC
2000
Springer
14 years 4 hour ago
2000
Springer
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
ASPLOS
2000
ACM
14 years 24 days ago
2000
ACM
Parallel, multithreaded C and C++ programs such as web servers, database managers, news servers, and scientific applications are becoming increasingly prevalent. For these applic...
IEEEPACT
2009
IEEE
14 years 3 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...