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» Pebble: A Language for Parametrised and Reconfigurable Hardw...
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VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
13 years 12 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
14 years 1 months ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...
EUROMICRO
2009
IEEE
14 years 2 months ago
Developing Adaptable Components Using Dynamic Languages
— The usage of dynamic languages is increasing among developers. As components are static entities, the usage of scripting languages, which are usually dynamically typed and inte...
Didier Donsez, Kiev Gama, Walter Rudametkin
FDL
2004
IEEE
13 years 11 months ago
On Actors and Objects - OOP in System Level Design
The steadily increasing complexity of embedded systems requires comprehensive methodoloat support the design process from the highest possible abstraction level. In most of the cu...
Joachim K. Anlauf, Philipp A. Hartmann